---
title: Optimizing FPGA Designs with AMD Versal AI | On - Demand Webinar
description: Join our live webinar to master FPGA design using AMD Versal AI. Learn integration and configuration techniques directly from industry expert Normand Leclerc. Register now to transform your FPGA skills.
---

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# Strategies for optimizing FPGA designs with AMD Versal Adaptive SoCs

### WEBINAR RECORDING ON-DEMAND

- **Speaker**: Normand Leclerc, Senior FPGA Designer
- **Duration:** 35 minutes

*Missed the live webinar? No worries! You can now access the on-demand version of our insightful webinar.*

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Under the guidance of Normand Leclerc, a seasoned Fidus expert in FPGA design, this webinar will clarifies the complexities of integrating and configuring the AMD Versal AI core series. Gain practical skills through a detailed demonstration of setting up a new Vivado project and will gain practical skills in system synthesis, placement, and the strategic use of the Network on Chip (NOC) for efficient data movement and design optimization.

**This webinar is ideal for:**

- FPGA Design Engineers
- Embedded Software Developers
- System Architects
- VPs of Engineering and Product Development
- CTOs and R&D Managers

**Why watch the webinar?**

- **Deep dive into AMD Versal AI:** Explore the architecture and capabilities of the AMD Versal AI core series VC1902 adaptive SoC and its application in FPGA designs.
- **Hands-on demonstration:** Practical walkthrough of a recent AMD Vivado project setup, showcasing integration and configuration techniques.
- **Expert insights:** Led by Normand Leclerc, gain firsthand knowledge of effective FPGA design strategies and the advantages of using the NOC for design partitioning and data movement.
- **Understanding AMD Versal AI core series:** Discover the features and potential of the AMD Versal AI core series, crucial for advancing in FPGA designs.
- **Integrating key system components:** Learn how to connect essential components like CIPS, DDR, and AI engines using the NOC, enhancing system performance and efficiency.
- **Optimizing data transfer:** Develop skills to optimize data movement across the FPGA chip, employing the NOC for efficient design partitioning, which is key to managing complex designs.
- **Visualizing and configuring NOC structures:** Gain insights into the NOC's configuration and learn techniques to visualize its structure, enabling better understanding and use in FPGA projects.

#### Watch the Webinar Recording

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